While programming STM8 microcontroller using assembly language, it is very important to know the internal architecture of the STM8 micro controllers. We are going to use the STM8s microcontroller and according to the Reference manual of STM8s microcontroller , the CPU of STM8s microcontroller consists 6 internal registers. Because the STM8 microcontroller is 8-bit microcontroller, which means it consists 8 bit CPU. These 6 registers provides efficient data handling and manipulation for this CPU.
As you may noticed in our previous introductory Assembly Language Tutorial of the STM8 microcontroller post, we had created a basic program in assembly language where we used the STVD IDE for developing the code for the stm8s103 microcontroller. We used few internal registers in that post. So this tutorial will be helpful to understand better and diving deep into the lower level details to let us fine tune our future Assembly Language Programs for the STM8 microcontroller.
These registers are named as follows according to the Datasheet of STM8S003F3 or STM8S103F3 microcontroller and their Reference Manual.
- Accumulator ( or A) Register
- Index Register (X)
- Index Register (Y)
- Program counter (or PC)
- Stack pointer (or SP)
- Condition code register ( or CC)
CPU Register Mapping Table
Most of these Registers are divided into Higher and Lower Register Group. The Address Space of these registers are according to following Register Mapping Table. This table is based according to the Reference manual. One more thing to remember here, that these register could not be accessed in core programming but from the external debug module only.
| Address Offset | Register | 7th Bit | 6th Bit | 5th Bit | 4th Bit | 3rd Bit | 2nd Bit | 1st Bit | 0th Bit |
|---|---|---|---|---|---|---|---|---|---|
| 0x00 | A | MSB | – | – | – | – | – | – | LSB |
| 0x01 | PCE | MSB | – | – | – | – | – | – | LSB |
| 0x02 | PCH | MSB | – | – | – | – | – | – | LSB |
| 0x03 | PCL | MSB | – | – | – | – | – | – | LSB |
| 0x04 | XH | MSB | – | – | – | – | – | – | LSB |
| 0x05 | XL | MSB | – | – | – | – | – | – | LSB |
| 0x06 | YH | MSB | – | – | – | – | – | – | LSB |
| 0x07 | YL | MSB | – | – | – | – | – | – | LSB |
| 0x08 | SPH | MSB | – | – | – | – | – | – | LSB |
| 0x09 | SPL | MSB | – | – | – | – | – | – | LSB |
| 0x0A | CC | V | 0 | I1 | H | I0 | N | Z | C |
Accumulator Register
This register is located at 0x00th index in CPU Register map and widely used for Arithmetic Operations. This register is 8 bit and could be used for General Purpose to hold arithmetic or Logic instructions data or results. In most of the micro controllers this Accumulator or A register act like a most favorite register of the programmers.
Program Counter Register (PCE,PCH, PCL)
Program Counter Register or PC Register is 24-bit and divided into three registers PCE, PCH and PCL for Extended Higher and Lower bytes respectively. This register is used to store the next executable instruction of the microcontroller. At every instruction executed, this register is automatically pointing to the next instruction. Due to the 24-bits, this register could access upto 16 Mega Bytes of the Memory.
Index registers (X and Y)
The X and Y registers are 16 bit wide and are divided into two 8-bit registers group. XH stands for Higher byte of the X Register and XL for the lower byte of the X register. Similarly the YH is for higher byte of the Y Register and the YL is for Lower byte of the Y Register. As their name (Index Registers) explains, these register are mostly used for generating Effective addresses. But they are also used as temporary data storage for the data manipulation instructions.
Condition code register (CC)
Unlike other above mentioned registers, this last register is bit accessible. This register is responsible for managing the Conditional program flow of the code. The 6th bit of this register is reserved and could not be used. But the other bits serves special purposes.
V: Overflow Bit
The 7th bit of the CC Register is for indicating the Overflow in the program. This could be due to any other the last executed Signed Arithmetic Instructions. Follwing Instructions could effect the V Overflow Flag
INC, INCW, DEC, DECW, NEG, NEGW, ADD, ADDW, ADC,
SUB, SUBW, SBC, CP, and CPW
I1 and I0 Interrupt mask level
These two bits in conjunction defines the current Interrupt ability Level. These flags could be manipulated (set or reset) via software using the following Instructions (According to the reference manual)
RIM, SIM, HALT, WFI, IRET, TRAP, POP instructions
Besides, These flags are automatically SET by the Hardware at the time of entering into the Interrupt Service Routine or ISR.
H: Half Carry Flag
This flag is used to indicate that Nibble is overflowed. Which means the Last Arithmetic instruction result is greater than 4 bits. So it happens between 3rd and 4rth bit of the ALU. Which is a great life saver while doing the BCD Arithmetic.
ADD and ADDC Instructions could effect H Flag
N: Negative Flag
This flag is helpful in signed operations to know that the last Arithmetic, Logical or any data manipulation result is negative. Which could be determined if the MSB is 1. So this Flag is useful to know either the result is negative or Positive. If this Flag is equal to 1 (SET) it means result is negative, otherwise Positive.
Z: Zero Flag
This flag is also related to Arithmetic and Logical Data Instructions. The being 1 of this Flag means that the last Arithmetic or Logical Instruction result is Zero.
C: Carry Flag
This flag is one of the most widely used flag in any of the microcontroller. So Yes, it is also widely used in STM8 microcontroller as well. Jsut like its name, this flag is used to indicate that the ALU is giving carry, or taking borrow. But this flag is not only used for Arithmetic operations, but also equally used in branching, bit testing, and Logical Shifting or rotating bits in bytes.
In Bit testing operations, C Flag is the copy of the tested bit. So, if we are using the BTJF or BTJT Instructions, it means we are coping the bit under test into the carry flag. Same is for Shifting and Rotating bits with RRC, RLC, SRL, SLL and SRA Instructions.
We may also SET or RESET this flag via SOFTWARE using the specific Instructions for this which are CCR, RCF, and SCR Instructions.
